1. Technical Field
The present invention relates to a scan line drive circuit, a display driver, an electro-optical apparatus, an electronic device, a driving method, and the like.
2. Related Art
Display panels having a so-called dual gate structure are known as a kind of display panel used in active matrix display devices. In a display panel having a dual gate structure, a pixel selected by a first scan line and a pixel selected by a second scan line are on the same display line (a display line in a horizontal scan direction), and these two pixels share a single data line.
For example, JP-A-2006-350289 discloses a known technique to drive the display panel having a dual gate structure. In JP-A-2006-350289, dot inversion driving is performed so that pixels that are adjacent to each other in the horizontal scan direction are driven with opposite polarities. The period in which a scan line is selected when driving a pixel after the polarity of a data voltage has been inverted is set longer than the period in which a scan line is selected when driving a pixel after the polarity of the data voltage has not been inverted.
In the case of performing dot inversion driving in a display panel having a dual gate structure, when a selected scan line changes, there are cases where the polarity of the data voltage supplied to the data line is inverted, as well as case where the polarity is not inverted. For example, when the first, second, third, and fourth scan lines are selected, data voltages of positive polarity, negative polarity, negative polarity, and positive polarity are supplied to respective data lines. In this case, the polarity of the data voltage is inverted when the second scan line is selected, and the polarity of the data voltage is not inverted when the third scan line is selected.
If the polarity of the data voltage has been inverted, a voltage change in the data voltage increases. Accordingly, the charging of capacitance on the data lines and the pixels takes more time than in the case where the polarity of the data voltage has not been inverted. For this reason, there is a possibility that the data voltage is not sufficiently written to the pixels after the polarity of the data voltage has been inverted, and display quality may be degraded (e.g. vertical noise occurs) accordingly. Note that this applies not only to the display panel having a dual gate structure. The same problem may occur if there are cases where the polarity of the data voltage supplied to a data line is inverted and the cases where the polarity is not inverted, when the selected scan line changes.
In the aforementioned JP-A-2006-350289, the insufficient writing is complemented by making a pixel charging period after the polarity of the data voltage has been inverted longer than a pixel charging period after the polarity of the data voltage has not been inverted. However, it is desirable that the data voltage is written to the pixels under the same conditions as much as possible. For example, after the polarity of the data voltage has been inverted, the time taken for the voltage of the data voltage settles is longer than that after the polarity of the data voltage has not been inverted. For this reason, the settling state of the data voltage at the timing at which a scan line was selected after the polarity of the data voltage has been inverted differs from that after the polarity of the data voltage has not been inverted. In terms of display quality, it is desirable that such differences in conditions do not occur as much as possible.